As integrated circuits become more dense it is necessary to decrease the dimensions of integrated circuit components. Small dimensions create the necessity to test components during fabrication to reduce failure in components. Components are fabricated on different levels of a substrate. The different levels are insulated from each other. Interconnects are formed through the insulators to components on different levels to form a working integrated circuit. This can be accomplished by etching holes in the insulating layers to connect one layer to another. In the art of integrated circuit manufacturing, these etched holes are referred to as contacts or vias.
A long standing problem in the art of fabricating integrated circuits is that of completing a process step and not knowing whether the process step completed successfully. This problem is further amplified by the smaller material dimensions. Some methods use light sources to view the etched holes but these methods have limited resolution in narrow holes for incompletely etched insulating film remaining at the bottom of the hole. If the step did not complete successfully, and the processing of the integrated circuit continues, then it is likely that at the end of the fabrication process the circuit will not work as designed. Thus, continued processing after a failed process step results in wasting the costs of processing after the failed step.
For these and other reasons, there is a need for the present invention.